The present invention relates to an information processing device with a plurality of input/output processors.
The following is a description, with references to FIG. 1, of a conventional information processing system with an information processing devices 1 and an input/output device group 2. The information processing device 1 is formed from a central processing device 4 and a main memory device 9. The input/output device group 2 is connected via a channel system 3 to the central processing device 4 and the main memory device 9. FIG. 2 shows the details of the architecture of the information processing device 1. The channel system 3 is formed from input/output processors 31-38. The central processing device 4 is formed from: common control units 41, 42; instruction processors 71-73; and a system control unit 60. Any number of these structural elements may be used. The common control units 41, 42 are connected to the system control unit 60 via information paths 41a, 42a respectively. The instruction processors 71-73 are connected to the system control unit 60 via information paths 71a-73a. The system control unit 60 is connected to the main memory device 9 via an information path 60a. The common control units 41, 42 transfer main memory access (write/read) requests from the input/output processors 31-38 to the system control unit 60 and sends the responses (e.g., main memory data) from the system control unit 60 to the input/output processors 31-38. The common control units 41, 42 transfer control information (e.g., interrupts) from the input/output processors 31-38 to the instruction processors 71-73 and transfers control information (e.g., activation requests) from the instruction processors 71-73 to the input/output processors 31-38.
In the conventional technology, single information paths 31a-38a serve as the information paths connecting the input/output processors 31-38 to the common control units 41, 42.
If there is a major failure in the common control unit 41, the common control unit 41 notifies the input/output processors 31-34 that a failure has occurred and failures are reported to software, e.g., the operating system, regarding all I/O operations being performed by the input/output processors 31-34.
The conventional technology has the following problems.
(1) If a major fixed failure takes place in the common control unit 41 and resumption of operations is not possible, the input/output processors 31-34 are no longer usable. If the input/output processors 31-34 become unusable, continued system operation may become difficult or the operating range may be reduced.
(2) A technology is available (hereinafter referred to as in-operation maintenance) in which, when a localized fixed failure occurs in a system and operations are continued with one section disabled, the hardware parts (generally a package or module on which parts are mounted) containing the failed section are replaced to recover the fixed failure section. If a localized fixed failure takes place in the common control unit 41 and the system is operating with the section disabled, replacing the common control unit 41 while the system is operating will prevent the input/output processors 31-34 from being used, thus making continued operation of the system difficult or reducing the operating range
(3) I/O operation retry features are provided in software, e.g., the operating system. If a major failure takes place in the common control unit 41, the failure is reported by the common control unit 41 to the input/output processors 31-34. Failure reports Care then sent to software, e.g., the operating system, regarding all I/O operations that were being processed by the input/output processors 31-34. This may result in multiple I/O operation retries that can cause a temporary shutdown of on-line operations.
The object of the present invention is to provide an information processing device that allows continued use of input/output processors even if a major fixed failure takes place in a common control unit and restoration is not possible.
Another object of the present invention is to provide an information processing unit that allows continued operation of a system even when a common control unit is replaced while the system is running.
Yet another object of the present invention is to provide an information processing device that can prevent temporary shut-downs of on-line operations caused by multiple retries of I/O operations when a failure takes place in the common control unit.
The present invention provides an information processing device in which a plurality of input/output processors is connected to a system control unit via a plurality of common control units. The plurality of common control units and at least one instruction processor are connected to a main memory device via the system control unit. A plurality of information paths is provided to connect each input/output processor to at least two different common control units.
Furthermore, in the present invention the input/output processor includes: means for storing commands issued to a common control unit and waiting for a response; and means for failure processing performing failure processing only for commands waiting for responses when a failure takes place in a common control unit.